accelerated naked ISR, still has bugs and possible performance improvements

master
Paul Goeser 14 years ago
parent f75ddde3e1
commit d89df867f8

29
gg.c

@ -2,8 +2,10 @@
#include <util/delay.h>
#include <avr/interrupt.h>
#include "ringbuf_small.c"
#include "mmc.h"
#include "gg.h"
void timer_init_tiny26(void)
{
@ -38,21 +40,20 @@ uint8_t buffer[BUFFER_SIZE];/* buffer for mmc data */
uint8_t pos = 0;/* current playing position */
uint8_t refresh_buffer = 0;/* position to start buffer refreshing */
ISR(TIMER1_OVF1_vect)
ISR(TIMER1_OVF1_vect, ISR_NAKED)
{
//if(!(TIFR & (1 << TOV1))) {continue;}/* interrupt flag polling */
//TIFR |= (1 << TOV1);/* done by hardware */
overflows--;
if(!overflows)
{
overflows = 1 << (SAMPLE_BITS - 8);
pos = (pos + 1) % BUFFER_SIZE;
}
/* TODO: a-law decoding */
/* TODO: 11bit PWM emulation */
OCR1A = buffer[pos];/* play sample */
__asm__("in r2, 0x3f"); // save sreg
if(--cnt_to_ocr_incr){
OCR1A = cur_ocr + 1;
}
if(--cnt_to_next){
cur_ocr = next_ocr;
cnt_to_ocr_incr = next_cnt_to_incr;
cnt_to_next = 8;
needs_new_data_flag = 1;
}
__asm__("out 0x2f,r2"); // restore sreg
reti();
}

13
gg.h

@ -0,0 +1,13 @@
// contains locked registers
#include <stdint.h>
register uint8_t sreg_tmp __asm__("r2");
register uint8_t cur_ocr __asm__("r3");
register uint8_t cnt_to_ocr_incr __asm__("r4");
register uint8_t next_ocr __asm__("r5");
register uint8_t next_cnt_to_incr __asm__("r6");
register uint8_t cnt_to_next __asm__("r7");
register uint8_t needs_new_data_flag __asm__("r8");
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