diff --git a/firmware/spi.c b/firmware/spi.c index 1892ee5..74b1e47 100644 --- a/firmware/spi.c +++ b/firmware/spi.c @@ -6,6 +6,19 @@ #include +/* SPI framework. + * + * currently alpha, uses interrupts, single master/single slave operation + */ + + +uint8_t * volatile spi_writeptr; +uint8_t * volatile spi_readptr; +uint8_t volatile spi_writelen; +uint8_t volatile spi_readlen; +uint8_t spi_readbuf[SPI_READBUF_LEN]; + + void spi_init(){ uint8_t spcr, spsr, d; @@ -25,21 +38,47 @@ void spi_init(){ d=7; } + //TODO: DDRs setzen + spsr = 0; spsr |= (d & 1) ? 0 : _BV(SPI2X); spcr = 0 | _BV(SPIE) | _BV(SPE); spcr |= (d & 2) ? _BV(SPR0) : 0; spcr |= (d & 4) ? _BV(SPR1) : 0; + #ifdef SPI_MASTER spcr |= _BV(MSTR); #endif SPCR = spcr; SPSR = spsr; + + // initialize interface for ISR: + spi_readptr = spi_readbuf; + spi_readlen = SPI_READBUF_LEN; + spi_writeptr = NULL; } +// return true on success, false on error +uint8_t spi_write(uint8_t *data, uint8_t len){ + if(spi_writeptr != NULL){ + return 0 + } + spi_writeptr = data; + spi_writelen = len; + //TODO: handle SS, write out first byte + return 1; +} + +#ifdef SPI_MASTER +ISR(SPI_vector){ + + + +} +#endif //SPI_MASTER diff --git a/firmware/spi.h b/firmware/spi.h index aabdb6f..493f10d 100644 --- a/firmware/spi.h +++ b/firmware/spi.h @@ -3,3 +3,4 @@ #define SPI_BAUDRATE 1000000 #define SPI_MASTER 1 +#define SPI_READBUF_LEN 32