added softtimer to slave

master
Dario Ernst 15 years ago
parent 18efd183f7
commit ca82044d49

@ -3,25 +3,6 @@
uint8_t newThermoData = 1;
uint16_t thermoData[] = {1024, 814, 2475, 2243};
volatile uint16_t timer1_acc;
uint16_t softtimer_last[SOFTTIMERNUMS];
void softtimer_reset(uint8_t timernum){
softtimer_last[timernum] = timer1_acc;
}
uint8_t softtimer(uint8_t timernum, uint16_t interval){
uint16_t timer1_acc_tmp = timer1_acc; // because of volatile
if((uint16_t)(timer1_acc_tmp - (uint16_t)(softtimer_last[timernum]) >= interval )){
softtimer_last[timernum] = timer1_acc_tmp;
return(1);
}
return(0);
}
// SOFTTIMER( <YOUR TIMER NUM>, <YOUR INTERVAL>);
#define SOFTTIMER(n,a) if(softtimer((n),(a*8)))
void hardinit() {
/* initializes the hardware */

@ -5,10 +5,14 @@
void hardinit() {
/* initializes the hardware */
// enable softtimer isr
TIMSK1 |= _BV(TOIE1);
sei();
}
void softinit() {
}
@ -17,6 +21,27 @@ int __attribute__((noreturn)) main(void) {
softinit();
for(;;){
SOFTTIMER(1,500) {
// do_stuff();
}
}
}
ISR(TIMER1_OVF_vect,ISR_NOBLOCK){
uint16_t tmp;
tmp=timer1_acc;
tmp++;
/* the ATOMIC is acutally only needed if timer1_acc is never read from an ISR, which
* is probably the case.
* ATOMIC_FORCEON: the ISR_NOBLOCK sets sei() a few cycles before.
*/
ATOMIC_BLOCK(ATOMIC_FORCEON){
timer1_acc=tmp;
}
}

@ -10,5 +10,6 @@
#include <stdio.h>
#define SOFTTIMERNUMS 4
#include "softtimer.h"
#endif //__MAIN_H

@ -0,0 +1 @@
../shared/softtimer.c

@ -0,0 +1 @@
../shared/softtimer.h
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