#include "main.h"
#include "spi.h"
#include "muxer.h"
#include "i2c_simple.h"
#include "mcp_adc.h"

#include "debug.h"

uint8_t foo;
uint16_t bar;
uint16_t timertmp;
uint16_t temperatures[4];

int32_t temp_avg_cumul;
int16_t temp_avg_count;


void baz() {
  foo++;
}

/* pinout
 * - i2c:
 *		C5
 *		C4
 * - multiplexer:
 *		C3: inhibit
 *		C0-C2: muxer select
 *	- offset measurement
 *	    D0-D3 offset compensation
 *
 *
 * amp 0 is on muxer channel 2
 */

#define MUXER_CHANNEL_0 2
#define MUXER_CHANNEL_1 0
#define MUXER_CHANNEL_2 1
#define MUXER_CHANNEL_3 3

void hardinit() {
  /* initializes the hardware */

  // enable softtimer isr
  TCCR1A = _BV(WGM10);
  TCCR1B = _BV(WGM12) | _BV(CS11); // clk/8 prescaler, 4kHz PWM-freq.
  TIMSK1 |= _BV(TOIE1);

  spi_init();

  muxer_init();
  offset_measure_init();
  
  i2c_init();

  sei();
}

void softinit() {
	
	//test values
	foo = 0x87;
	bar= 0xfafa;

	mcpadc_init(ADC_GAIN_2|ADC_CONV_CONT|ADC_BITS_16);

}


int __attribute__((noreturn)) main(void) {
  temperatures[2]=1;
  hardinit();
  temperatures[2]=10;
  softinit();

  muxer_set(MUXER_CHANNEL_0);
  temperatures[2]=0;
  dbgLog("Hallo, Welt!\n");

  for(;;){
    
    SOFTTIMER(1,10) {
		if(mcpadc_has_new_data()) {
			temperatures[0] = mcpadc_get_data();
			temperatures[2]++;
			int16_t temp = temperatures[0];
			temp_avg_cumul += temp;
			temp_avg_count += 1;
		}
		temperatures[1] = 22;
    }
	SOFTTIMER(2,500){
		int32_t temp = temp_avg_cumul;
		temp /= temp_avg_count;
		temp_avg_count = 0; temp_avg_cumul = 0;
		int32_t nV = (temp * 625);
		int32_t mK = nV/39;

		dbgLog("temp: %6li (%li µV, %li mK)\n",temp,nV/1000, mK);
	}

	SOFTTIMER(3,4000){
		static uint8_t toggle;
		if(toggle){
			offset_measure_start(0);
			toggle=0;
			dbgLog("measuring offset\n");
		} else {
			offset_measure_stop();
			toggle=1;
			dbgLog("stopping offset-measuring\n");
		}
	}

  }
}



ISR(TIMER1_OVF_vect,ISR_NOBLOCK){
    timertmp=timer1_acc;
    timertmp++;

    /* the ATOMIC is acutally only needed if timer1_acc is never read from an ISR, which
     * is probably the case.
     * ATOMIC_FORCEON: the ISR_NOBLOCK sets sei() a few cycles before.
     */
    ATOMIC_BLOCK(ATOMIC_FORCEON){ 
        timer1_acc=timertmp;
    }

}