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#include "main.h"
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#include "spi.h"
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#include "muxer.h"
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#include "i2c_simple.h"
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#include "mcp_adc.h"
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uint8_t foo;
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uint16_t bar;
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uint16_t timertmp;
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uint16_t temperatures[4];
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void baz() {
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foo++;
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}
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/* pinout
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* - i2c:
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* C5
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* C4
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* - multiplexer:
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* C3: inhibit
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* C0-C2: muxer select
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*
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*
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* amp 0 is on muxer channel 2
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*/
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#define MUXER_CHANNEL_0 2
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#define MUXER_CHANNEL_1 0
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#define MUXER_CHANNEL_2 1
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#define MUXER_CHANNEL_3 3
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void hardinit() {
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/* initializes the hardware */
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// enable softtimer isr
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TCCR1A = _BV(WGM10);
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TCCR1B = _BV(WGM12) | _BV(CS11); // clk/8 prescaler, 4kHz PWM-freq.
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TIMSK1 |= _BV(TOIE1);
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spi_init();
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muxer_init();
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i2c_init();
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sei();
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}
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void softinit() {
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// TODO: to prevent evil random access and stuff?
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temperatures[0] = 0;
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temperatures[1] = 0;
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temperatures[2] = 0;
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temperatures[3] = 0;
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//test values
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foo = 0x87;
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bar= 0xfafa;
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mcpadc_init(ADC_GAIN_2|ADC_CONV_SINGLE|ADC_BITS_16);
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}
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int __attribute__((noreturn)) main(void) {
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temperatures[2]=1;
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hardinit();
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temperatures[2]=10;
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softinit();
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muxer_set(MUXER_CHANNEL_0);
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temperatures[2]=33;
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for(;;){
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SOFTTIMER(1,100) {
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if(mcpadc_has_new_data()) {
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temperatures[0] = mcpadc_get_data();
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temperatures[2]++;
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}
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temperatures[1] = 22;
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}
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}
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}
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ISR(TIMER1_OVF_vect,ISR_NOBLOCK){
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timertmp=timer1_acc;
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timertmp++;
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/* the ATOMIC is acutally only needed if timer1_acc is never read from an ISR, which
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* is probably the case.
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* ATOMIC_FORCEON: the ISR_NOBLOCK sets sei() a few cycles before.
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*/
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ATOMIC_BLOCK(ATOMIC_FORCEON){
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timer1_acc=timertmp;
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}
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}
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