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#include "main.h"
#include "spi.h"
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#include "muxer.h"
#include "i2c_simple.h"
#include "mcp_adc.h"
uint8_t foo;
uint16_t bar;
uint16_t timertmp;
uint16_t temperatures[4];
void baz() {
foo++;
}
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/* pinout
* - i2c:
* C5
* C4
* - multiplexer:
* C3: inhibit
* C0-C2: muxer select
*
*
* amp 0 is on muxer channel 2
*/
#define MUXER_CHANNEL_0 2
#define MUXER_CHANNEL_1 0
#define MUXER_CHANNEL_2 1
#define MUXER_CHANNEL_3 3
void hardinit() {
/* initializes the hardware */
// enable softtimer isr
TCCR1A = _BV(WGM10);
TCCR1B = _BV(WGM12) | _BV(CS11); // clk/8 prescaler, 4kHz PWM-freq.
TIMSK1 |= _BV(TOIE1);
spi_init();
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muxer_init();
i2c_init();
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sei();
}
void softinit() {
// TODO: to prevent evil random access and stuff?
temperatures[0] = 0;
temperatures[1] = 0;
temperatures[2] = 0;
temperatures[3] = 0;
//test values
foo = 0x87;
bar= 0xfafa;
mcpadc_init(ADC_GAIN_2|ADC_CONV_SINGLE|ADC_BITS_16);
}
int __attribute__((noreturn)) main(void) {
temperatures[2]=1;
hardinit();
temperatures[2]=10;
softinit();
muxer_set(MUXER_CHANNEL_0);
temperatures[2]=33;
for(;;){
SOFTTIMER(1,100) {
if(mcpadc_has_new_data()) {
temperatures[0] = mcpadc_get_data();
temperatures[2]++;
}
temperatures[1] = 22;
}
}
}
ISR(TIMER1_OVF_vect,ISR_NOBLOCK){
timertmp=timer1_acc;
timertmp++;
/* the ATOMIC is acutally only needed if timer1_acc is never read from an ISR, which
* is probably the case.
* ATOMIC_FORCEON: the ISR_NOBLOCK sets sei() a few cycles before.
*/
ATOMIC_BLOCK(ATOMIC_FORCEON){
timer1_acc=timertmp;
}
}