spi protocol fix (still untested)

master
Paul Goeser 15 years ago
parent 0b0eec2186
commit c6542e4a3f

@ -9,7 +9,7 @@
usbMsgLen_t usbFunctionSetup(uchar data[8]) { usbMsgLen_t usbFunctionSetup(uchar data[8]) {
usbRequest_t *rq = (void *)data; usbRequest_t *rq = (void *)data;
static uchar dataBuffer[4]; static uchar dataBuffer[5];
if(rq->bRequest == 100) { if(rq->bRequest == 100) {
dataBuffer[0] = (thermoData [0] & 0xff00)>>8; dataBuffer[0] = (thermoData [0] & 0xff00)>>8;
@ -32,13 +32,16 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) {
uint8_t valL = (uint8_t) rq->wIndex.bytes[1]; uint8_t valL = (uint8_t) rq->wIndex.bytes[1];
uint16_t send = (valH << 8) | valL; uint16_t send = (valH << 8) | valL;
uint16_t recv = spi_master_communicate(opcode, addr, send); // uint16_t recv = spi_master_communicate(opcode, addr, send);
dataBuffer[0] = (recv >> 8) & 0xff; dataBuffer[0] = opcode;
dataBuffer[1] = recv & 0xff; dataBuffer[1] = addr;
dataBuffer[2] = 0x0000; dataBuffer[2] = valH;
dataBuffer[3] = 0x0000; dataBuffer[3] = valL;
usbMsgPtr = dataBuffer; spi_mst_start_packet();
spi_mst_write_read(5,dataBuffer);
spi_mst_end_packet();
usbMsgPtr = dataBuffer+1;
return 4; return 4;
} }

@ -14,8 +14,9 @@
* currently alpha, uses interrupts, single master/single slave operation * currently alpha, uses interrupts, single master/single slave operation
*/ */
uint8_t readbuf[4]; uint8_t readbuf[5];
uint8_t writebuf[4]; uint8_t writebuf[5];
uint8_t writebuf2[5] = {2, 4, 6, 0x12, 5};
uint8_t pos; uint8_t pos;
@ -72,6 +73,8 @@ void spi_init(){
#ifndef SPI_MASTER #ifndef SPI_MASTER
SPCR |= _BV(SPIE); //enable interrupts SPCR |= _BV(SPIE); //enable interrupts
PCMSK0 |= _BV(2);
PCICR |= _BV(0);
#endif #endif
pos = 0; pos = 0;
} }
@ -135,9 +138,9 @@ void spi_sla_handle_packet(){
writebuf[3]=(data)&0xff; writebuf[3]=(data)&0xff;
} else { } else {
writebuf[0]=0; writebuf[0]=0;
writebuf[1]=0; writebuf[1]=2;
writebuf[2]=0; writebuf[2]=4;
writebuf[3]=0; writebuf[3]=6;
data = (readbuf[3]<<8)&0xff | readbuf[4]; data = (readbuf[3]<<8)&0xff | readbuf[4];
spi_proto_handleread(opcode, addr, data); spi_proto_handleread(opcode, addr, data);
} }
@ -146,9 +149,18 @@ void spi_sla_handle_packet(){
ISR(SPI_STC_vect){ ISR(SPI_STC_vect){
SPDR = *(writebuf+pos); SPDR = writebuf[pos];
*(readbuf+pos) = SPDR; readbuf[pos] = SPDR;
pos++; pos++;
if(pos>=5){
pos=4;
}
}
ISR(PCINT0_vect){
if(SPI_SSIN & _BV(SPI_SS_PIN)){ if(SPI_SSIN & _BV(SPI_SS_PIN)){
pos=0; pos=0;
SPCR &= ~(_BV(SPIE)); SPCR &= ~(_BV(SPIE));
@ -157,14 +169,10 @@ ISR(SPI_STC_vect){
SPCR |= _BV(SPIE); SPCR |= _BV(SPIE);
} }
} }
#endif //not SPI_MASTER
#endif //not SPI_MASTER

@ -23,9 +23,13 @@ uint16_t spi_master_communicate(uint8_t opcode, uint8_t addr, uint16_t value)
write_data[1] = addr; write_data[1] = addr;
write_data[2] = value >> 8; write_data[2] = value >> 8;
write_data[3] = value & 0xff; write_data[3] = value & 0xff;
spi_mst_start_packet();
spi_mst_write_read(4,write_data); spi_mst_write_read(4,write_data);
spi_mst_end_packet();
while(write_data[0] == 0){ while(write_data[0] == 0){
spi_mst_start_packet();
spi_mst_write_read(4,write_data); spi_mst_write_read(4,write_data);
spi_mst_end_packet();
} }
return (write_data[2] << 8) | read_data[3]; return (write_data[2] << 8) | read_data[3];
} }
@ -89,8 +93,8 @@ void call_func(uint8_t number)
uint8_t spi_proto_needswrite(uint8_t opcode) { uint8_t spi_proto_needswrite(uint8_t opcode) {
if(opcode == 4 || opcode == 5) return 1; if(opcode == 4 || opcode == 5) return 0;
return 0; return 1;
} }
uint16_t spi_proto_handlewrite(uint8_t opcode, uint8_t addr) { uint16_t spi_proto_handlewrite(uint8_t opcode, uint8_t addr) {
@ -99,7 +103,7 @@ uint16_t spi_proto_handlewrite(uint8_t opcode, uint8_t addr) {
} else if(opcode == 5) { } else if(opcode == 5) {
return (*spi_proto_globals16[addr]); return (*spi_proto_globals16[addr]);
} else { } else {
return 0xFFFF; return 0xFeFe;
} }
} }

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